Dr. Kavindra Kandpal
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Research Projects
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Device-to-Circuit Integrated Design of ZnO TFT based Pixel Circuits on
Flexible Substrates
Funding Agency: Seed Money Project, IIIT Allahabad
Duration: 2021–2023
Role: PI
Approved Funds: ₹9.44 lakhs INR -
Nanometer scaled Topological Insulators for future micro and opto
electronic applications
Funding Agency: DST, SERB (Grant No. CRG/2022/000070)
Duration: 2023–2026
Role: Co-PI
Approved Funds: ₹32.56 lakhs INR -
ML Enabled RISC-V based i-LORA SOC for Forest event monitoring
Funding Agency: Chips to Startup (C2S), Ministry of Electronics & Information Technology
Duration: 2023–2028
Role: Co-CI
Approved Funds: ₹96 lakhs INR
Research Interests
- Analog IC Design: Low power, high speed CMOS Operational Amplifier design, high speed comparators, current references, and bandgap reference circuit design.
- Mixed Signal Design: Sigma-Delta modulators, DQPSK demodulators, clocked comparators and flip-flops, memory circuit design.
- Oxide TFTs: Device modelling, transparent electronics, device fabrication, threshold voltage insensitive pixel driver circuitry design.
Notable Publication
A 10T SRAM Architecture with 40% Enhanced Throughput for IMC Applications
Benchmarked with CIFAR-10 Dataset
Design of 6T-1C pixel circuit for flexible displays — A.
Srivastava, D. Dubey, M. Goswami, and K. Kandpal,
Microelectronics Journal, 2021.
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